74HC595D

8-stage serial shift register, high-speed, Si-gate CMOS device, SOP, -0.5 to +7 V

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Price:: US $0.02~1.50 / piece [Get Latest Price]

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PartNumber:: 74HC595D

Brand:: NXP Semiconductors - nxp | Pack: SOP | D/C: 11+

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Products Upload time: 2011-11-30

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Product Summary

The 74HC595D is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74HC595D is an 8-stage serial shift register with a storage register and 3-state outputs. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. The shift register 74HC595D has a serial input (DS) and a serial standard output (Q7S) for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages.

Parametrics

74HC595D absolute maximum ratings: (1)VCC, supply voltage: -0.5 to +7 V; (2)IIK, input clamping current, VI < -0.5 V or VI > VCC + 0.5V: ± 20 mA max; (3)IOK, output clamping current VO < -0.5 V or VO > VCC + 0.5 V: ±20 mA max; (4)IO, output current VO = -0.5 V to (VCC + 0.5 V): pin Q7S: ±25 mA max; pins Qn: ±35 mA max; (5)ICC, supply current: 70 mA max; (6)IGND, ground current: -70 mA min; (7)Tstg, storage temperature: -65 to +150℃; (8)Ptot, total power dissipation: DIP16 package: 750 mW max; SO16 package: 500 mW max; SSOP16 package: 500 mW max; TSSOP16 package: 500 mW max; DHVQFN16 package: 500 mW max.

Features

74HC595D features: (1)8-bit serial input; (2)8-bit serial or parallel output; (3)Storage register with 3-state outputs; (4)Shift register with direct clear; (5)100 MHz (typical) shift out frequency; (6)ESD protection: HBM JESD22-A114F exceeds 2000 V; MM JESD22-A115-A exceeds 200 V; (7)Multiple package options; (8)Specified from -40℃ to +85℃ and from -40℃ to +125℃.