(China (Mainland))
Product Summary
The CY7C961-NC is a true superset of the CY7C960. Signal pins have been added to control CY7C964 DMA functions. Existing VEMbus input pins have been changed to bidirectional and augmented to complete a master interface. As a VMEbus Slave, the CY7C961-NC behaves in every respect like the CY7C960. It simply has more pins, a master block transfer facility, and (because of addition of the BBSY* connection) full lock cycle support. From a system perspective, the CY7C961-NC master block transfer capability can be viewed as a DMA channel that resides on the slave card, but is controlled over the VMEbus by one or more VMEbus masters or programmed from the local bus.
Parametrics
CY7C961-NC DC Specifications:(1)Maximum High-LevelInput Voltage:2.0 V; (2)Maximum Low-Level Input Voltage:0.8 V;(3)Minimum High-Level Output Voltage:Industrial 2.4–10 mA V;(4)Minimum Low-Level Output Voltage:Industrial 0.6 18 mA V; (5)Maximum Input Leakage Current: ±5 μA; (6)Input Clamp Voltage: –1.2 V; (7)Maximum Output Leakage Current: Industrial±5μA.
Features
CY7C961-NC features: (1)80-Mbyte-per-second block transfer rates ; (2)All VME64 transactions provided, including A64/D64,A40/MD32 transfers ; (3)Auto Slot ID; (4)CR/CSR space; (5)All standard (Rev C) VMEbus transactions implemented; (6)VMEbus Interrupter; (7)No local CPU required; (8)Programmable from VMEbus, serial PROM, or local bus; (9)DRAM controller, including refresh; (10)On-chip DMA controller ; (11)Local I/O controller; (12)Flexible VMEbus address scheme; (13)User-configured VMEbus response; (14)64-pin TQFP, 10x10mm (CY7C960); (15)100-pin TQFP, 14x14mm (CY7C961).
Diagrams
